Are you interested in embedded systems and security? Do you have already experience with FPGAs? Do you want to know more about the fine grained architecture of state-of-the-art FPGAs? Are you interested in developing adaptive hardware systems with dynamically changing hardware structures? Do you want to know, how partial dynamic reconfiguration of FPGAs could be used to increase the security of a system? Do you want to know which threats security-related embedded systems are exposed? Are you interested to protect sensible informations (e.g., keys) in embedded systems from attacks like side channel analysis, fault injection attacks, and reverse engineering?
The CAES group is looking for two talented researcher or postdocs for working in the project Security by Reconfiguration (SecRec). Field Programmable Gate Arrays (FPGAs) represent an efficient platform for cryptographic hardware implementations. However, in order to be hardened against any physical attacks, each security-critical circuit implemented on an FPGA must be protected against (a) side channel analysis, (b) fault injection attacks, and (c) reverse engineering. Accordingly, this project aims to develop techniques that are able to utilize the dynamic reconfiguration capabilities of FPGAs for effective protection mechanisms against the above mentioned class of attacks. The overall project will solve the fundamental problem of cryptographic hardware implementations, namely that these implementations exist only as static circuits and can therefore easily be analyzed. In particularly, this project focuses on the research and development of countermeasures against fault injection attacks and reverse engineering under laboratory conditions.
In SecRec, three renowned research institutes and universities, one medium-size company with excellent credentials and one worldwide leading technology corporation are working together in order to jointly develop innovative approaches for hardware security implementations. These approaches utilizing dynamic reconfiguration in order to protected security implementations against a variety of physical attack classes. In particularly, this subproject focuses on two classes of reconfiguration techniques in order to prevent fault inject attacks and reverse engineering. Local reconfiguration replaces configuration of special FPGA elements, whereas partial dynamic reconfiguration enables a replacement of complete sub circuits at run time. The development of such resistant circuits includes a threat analysis, research and development of countermeasures, as well as the evaluation and demonstration of the gained protection.
We are seeking a highly motivated person with a good background in embedded systems, reconfigurable computing, security or closely related areas.
You enjoy communicating your work verbally and in writing. You like working in a team, your curiosity inspires progress and you have clear scientific communication skills. We prefer applicants with strong English language proficiency.
Potential applicants are encouraged to discuss the projects with Dr. Daniel Ziener (email@example.com) prior to submitting applications.
We want you to play a key role in an ambitious project in an inspiring international environment.